Start generating at 2019-05-06 16:29
Instance: afifo_32i_64o_256 (D:\example_ziguang\sd_picture_hdmi\ipcore\afifo_32i_64o_256)
Model: Logos DRM Based FIFO, Version 1.3
Family: Logos
Device: PGL22G
Package: BG324
Speed Grade: -7
Create directory 'rtl' ...
Copy 'rtl\ipml_fifo_ctrl_v1_3.v' to 'rtl' ...
Copy 'rtl\ipml_fifo_v1_3.v.xml' to 'rtl' ...
Copy 'rtl\ipml_prefetch_fifo_v1_3.v.xml' to 'rtl' ...
Copy 'rtl\ipml_reg_fifo_v1_0.v' to 'rtl' ...
Copy 'rtl\ipml_sdpram_v1_3.v.xml' to 'rtl' ...
Compile file 'rtl\ipml_sdpram_v1_3.v.xml' to 'rtl\ipml_sdpram_v1_3_afifo_32i_64o_256.v' ...
Compile file 'rtl\ipml_fifo_v1_3.v.xml' to 'rtl\ipml_fifo_v1_3_afifo_32i_64o_256.v' ...
Compile file 'rtl\ipml_prefetch_fifo_v1_3.v.xml' to 'rtl\ipml_prefetch_fifo_v1_3_afifo_32i_64o_256.v' ...
Copy 'ipml_fifo_wrapper_v1_3.v.xml' ...
Compile file 'ipml_fifo_wrapper_v1_3.v.xml' to 'afifo_32i_64o_256.v' ...
Found module 'afifo_32i_64o_256' in file 'afifo_32i_64o_256.v'.
Copy 'ipml_prefetch_fifo_wrapper_v1_3.v.xml' ...
Compile file 'ipml_prefetch_fifo_wrapper_v1_3.v.xml' to 'afifo_32i_64o_256_prefetch.v' ...
Copy 'ipml_fifo_wrapper_v1_3_tb.v.xml' ...
Compile file 'ipml_fifo_wrapper_v1_3_tb.v.xml' to 'afifo_32i_64o_256_tb.v' ...
Generate template file 'afifo_32i_64o_256_tmpl.v' ...
Synthesis is disabled.
Done: 0 error(s), 0 warning(s)
