//////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2014 PANGO MICROSYSTEMS, INC
// ALL RIGHTS REVERVED.
//
// THE SOURCE CODE CONTAINED HEREIN IS PROPRIETARY TO PANGO MICROSYSTEMS, INC.
// IT SHALL NOT BE REPRODUCED OR DISCLOSED IN WHOLE OR IN PART OR USED BY
// PARTIES WITHOUT WRITTEN AUTHORIZATION FROM THE OWNER.
//
//////////////////////////////////////////////////////////////////////////////
// trigger_output module, set the trigger out
// Called by     :  debug_core
// Modification history
//----------------------------------------------------------------------

module ips_dbc_trigger_output_v1_2
#(
 parameter NEW_JTAG_IF     = 1,
 parameter  AREA_SPEED = 0,                      //0~5, EXPERIMENTAL
 parameter  TRIG_OUT_CHAIN_BIT = 3,	             //{trig_out_mode}
 parameter INIT_TRIG_OUT = 0 
 )
(
  input                         h_rstn ,
  input                         clk_conf,
  input                         rst_conf,
  input                         conf_sel,
  input                         conf_tdi,
  input                         clk_trig,
  input                         rst_trig,
  input                         trigger ,
  input                         shift_i,  
  output  reg                   trig_out,
  input                         conf_rden,
	input [4:0]                   conf_id,
	input                         conf_sel_rd,
  output                        conf_rdlast,
  output                        conf_rdata   
);

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endmodule