Start generating at 2019-06-04 15:25
Instance: pll_sft (D:\example_ziguang\demo\ddr3_ov5640_hdmi_fulltest\source\pll_sft)
Model: Logos PLL, Version 1.4
Family: Logos
Device: PGL22G
Package: BG324
Speed Grade: -7
Create directory 'rtl' ...
Copy 'ipml_pll_wrapper_v1_4.v.xml' ...
Compile file 'ipml_pll_wrapper_v1_4.v.xml' to 'pll_sft.v' ...
Found module 'pll_sft' in file 'pll_sft.v'.
Copy 'ipml_pll_wrapper_v1_4_tb.v.xml' ...
Compile file 'ipml_pll_wrapper_v1_4_tb.v.xml' to 'pll_sft_tb.v' ...
Generate template file 'pll_sft_tmpl.v' ...
Synthesis is disabled.
Done: 0 error(s), 0 warning(s)
