Clock Regions-Block Scope:
+--------------------------------------------------------------------------+
| (X0,Y*): (Xmin,Xmax,Ymin,Ymax)     | (X1,Y*): (Xmin,Xmax,Ymin,Ymax)     
+--------------------------------------------------------------------------+
| (X0,Y2): (0,39,60,89)              | (X1,Y2): (40,75,60,89)             
| (X0,Y1): (0,39,30,59)              | (X1,Y1): (40,75,30,59)             
| (X0,Y0): (0,39,0,29)               | (X1,Y0): (40,75,0,29)              
+--------------------------------------------------------------------------+

Clock Regions-Clock Primitives:
+--------------------------------------------------------------------------------------------------------------------------------------+
| Clock Region Name     | CLK PAD     | PLL PAD     | RCKB     | IOCKGATE     | IOCKDIV     | CLMA     | CLMS     | DRM     | APM     
+--------------------------------------------------------------------------------------------------------------------------------------+
| (X0,Y0)               | 4           | 6           | 4        | 2            | 2           | 520      | 180      | 12      | 0       
| (X0,Y1)               | 4           | 6           | 4        | 2            | 2           | 610      | 210      | 12      | 0       
| (X0,Y2)               | 4           | 6           | 4        | 2            | 2           | 524      | 180      | 6       | 0       
| (X1,Y0)               | 4           | 6           | 4        | 2            | 2           | 450      | 150      | 6       | 10      
| (X1,Y1)               | 4           | 6           | 4        | 2            | 2           | 540      | 180      | 6       | 10      
| (X1,Y2)               | 4           | 6           | 4        | 2            | 2           | 630      | 210      | 6       | 10      
+--------------------------------------------------------------------------------------------------------------------------------------+

Global Clock Buffer Constraint Details:
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source  Name                                       | Source Pin     | Source-Buffer Net              | Buffer Input Pin     | Buffer  Name                   | Buffer Output Pin     | Buffer-Load Net     | Clock Region Of Buffer Site     | Buffer Site     | IO Load Clock Region     | Non-IO Load Clock Region     | Clock Loads     | Non-Clock Loads     
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT2        | cmos_xclk_w                    | CLK                  | cmos_xclkbufg/gopclkbufg       | CLKOUT                | nt_cmos_xclk        |  ---                            |  ---            | (72,72,55,55)            |  ---                         | 0               | 1                   
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT0        | video_clk_w                    | CLK                  | video_clkbufg/gopclkbufg       | CLKOUT                | video_clk           |  ---                            |  ---            |  ---                     |  ---                         | 6591            | 0                   
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | TCK_USER       | u_CORES/drck_o                 | CLK                  | clkbufg_6/gopclkbufg           | CLKOUT                | ntclkbufg_3         |  ---                            |  ---            |  ---                     |  ---                         | 875             | 0                   
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT3        | ui_clk                         | CLK                  | clkbufg_5/gopclkbufg           | CLKOUT                | ntclkbufg_2         |  ---                            |  ---            |  ---                     | (11,11,20,20)                | 356             | 0                   
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT1        | u_ipsl_hmic_h_top/pll_pclk     | CLK                  | clkbufg_4/gopclkbufg           | CLKOUT                | ntclkbufg_1         |  ---                            |  ---            |  ---                     | (11,11,20,20)                | 160             | 0                   
| sys_clk_ibuf/opit_1                                | INCK           | _N23                           | CLK                  | sys_clkbufg/gopclkbufg         | CLKOUT                | sys_clk_g           |  ---                            |  ---            |  ---                     | (39,39,16,16)                | 111             | 0                   
| cmos_pclk_ibuf/opit_1                              | INCK           | _N17                           | CLK                  | cmos_pclkbufg/gopclkbufg       | CLKOUT                | cmos_pclk_g         |  ---                            |  ---            |  ---                     |  ---                         | 69              | 0                   
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT1        | video_clk5x_w                  | CLK                  | video_clk5xbufg/gopclkbufg     | CLKOUT                | video_clk5x         |  ---                            |  ---            | (72,74,72,85)            |  ---                         | 49              | 0                   
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | CAPDR          | u_CORES/capt_o                 | CLK                  | clkbufg_3/gopclkbufg           | CLKOUT                | ntclkbufg_0         |  ---                            |  ---            |  ---                     | (4,39,0,89)                  | 11              | 0                   
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

Global Clock Source Constraint Details:
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source Name                                        | Source Pin     | Source-Load Net                | Clock Region Of Source Site     | Source Site          | Clock Buffer Loads     | Non-Clock Buffer Loads     
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT2        | cmos_xclk_w                    |  ---                            |  ---                 | 1                      | 0                          
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT0        | video_clk_w                    |  ---                            |  ---                 | 1                      | 0                          
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | TCK_USER       | u_CORES/drck_o                 | (X0,Y2)                         | SCANCHAIN_48_328     | 1                      | 0                          
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT3        | ui_clk                         | (X0,Y0)                         | PLL_82_71            | 1                      | 0                          
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT1        | u_ipsl_hmic_h_top/pll_pclk     | (X0,Y0)                         | PLL_82_71            | 1                      | 0                          
| sys_clk_ibuf/opit_1                                | INCK           | _N23                           | (X0,Y2)                         | IOL_7_298            | 1                      | 0                          
| cmos_pclk_ibuf/opit_1                              | INCK           | _N17                           | (X1,Y1)                         | IOL_151_173          | 1                      | 0                          
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT1        | video_clk5x_w                  |  ---                            |  ---                 | 1                      | 0                          
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | CAPDR          | u_CORES/capt_o                 | (X0,Y2)                         | SCANCHAIN_48_328     | 1                      | 0                          
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

IO Clock Buffer Constraint Details:
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source  Name                                       | Source Pin     | Source-Buffer Net     | Buffer Input Pin     | Buffer  Name                                                                        | Buffer Output Pin     | Buffer-Load Net                                                    | Clock Region Of Buffer Site     | Buffer Site     | IO Load Clock Region     | Non-IO Load Clock Region     | Clock Loads     | Non-Clock Loads     
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT0_WL     | clkout0_wl_0          | CLK                  | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclkbuf01_dut/gopclkgate     | OUT                   | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclk_01     |  ---                            |  ---            | (0,3,2,27)               | (17,17,13,13)                | 20              | 1                   
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT0_WL     | clkout0_wl_0          | CLK                  | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclkbuf02_dut/gopclkgate     | OUT                   | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclk_02     |  ---                            |  ---            | (1,3,37,43)              | (1,3,37,43)                  | 3               | 0                   
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

IO Clock Source Constraint Details:
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source Name                                        | Source Pin     | Source-Load Net     | Clock Region Of Source Site     | Source Site     | Clock Buffer Loads     | Non-Clock Buffer Loads     
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT0_WL     | clkout0_wl_0        | (X0,Y0)                         | PLL_82_71       | 2                      | 0                          
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

Device Cell Placement Summary for Global Clock Buffer:
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source  Name                                       | Source  Pin     | Source-Buffer Net              | Buffer Input Pin     | Buffer  Name                   | Buffer Output Pin     | Buffer-Load Net     | Buffer Site     | IO Load Clock Region     | Non-IO Load Clock Region     | Clock Loads     | Non-Clock Loads     
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT2         | cmos_xclk_w                    | CLK                  | cmos_xclkbufg/gopclkbufg       | CLKOUT                | nt_cmos_xclk        | USCM_74_108     | (72,72,55,55)            |  ---                         | 0               | 1                   
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT0         | video_clk_w                    | CLK                  | video_clkbufg/gopclkbufg       | CLKOUT                | video_clk           | USCM_74_109     |  ---                     |  ---                         | 6591            | 0                   
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | TCK_USER        | u_CORES/drck_o                 | CLK                  | clkbufg_6/gopclkbufg           | CLKOUT                | ntclkbufg_3         | USCM_74_133     |  ---                     |  ---                         | 875             | 0                   
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT3         | ui_clk                         | CLK                  | clkbufg_5/gopclkbufg           | CLKOUT                | ntclkbufg_2         | USCM_74_104     |  ---                     | (11,11,20,20)                | 356             | 0                   
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT1         | u_ipsl_hmic_h_top/pll_pclk     | CLK                  | clkbufg_4/gopclkbufg           | CLKOUT                | ntclkbufg_1         | USCM_74_105     |  ---                     | (11,11,20,20)                | 160             | 0                   
| sys_clk_ibuf/opit_1                                | INCK            | _N23                           | CLK                  | sys_clkbufg/gopclkbufg         | CLKOUT                | sys_clk_g           | USCM_74_106     |  ---                     | (39,39,16,16)                | 111             | 0                   
| cmos_pclk_ibuf/opit_1                              | INCK            | _N17                           | CLK                  | cmos_pclkbufg/gopclkbufg       | CLKOUT                | cmos_pclk_g         | USCM_74_107     |  ---                     |  ---                         | 69              | 0                   
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT1         | video_clk5x_w                  | CLK                  | video_clk5xbufg/gopclkbufg     | CLKOUT                | video_clk5x         | USCM_74_110     | (72,74,72,85)            |  ---                         | 49              | 0                   
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | CAPDR           | u_CORES/capt_o                 | CLK                  | clkbufg_3/gopclkbufg           | CLKOUT                | ntclkbufg_0         | USCM_74_132     |  ---                     | (4,39,0,89)                  | 11              | 0                   
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

Device Cell Placement Summary for Global Clock Source:
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source Name                                        | Source  Pin     | Source-Load Net                | Source Site          | Clock Buffer Loads     | Non-Clock Buffer Loads     
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT2         | cmos_xclk_w                    | PLL_82_51            | 1                      | 0                          
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT0         | video_clk_w                    | PLL_82_51            | 1                      | 0                          
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | TCK_USER        | u_CORES/drck_o                 | SCANCHAIN_48_328     | 1                      | 0                          
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT3         | ui_clk                         | PLL_82_71            | 1                      | 0                          
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT1         | u_ipsl_hmic_h_top/pll_pclk     | PLL_82_71            | 1                      | 0                          
| sys_clk_ibuf/opit_1                                | INCK            | _N23                           | IOL_7_298            | 1                      | 0                          
| cmos_pclk_ibuf/opit_1                              | INCK            | _N17                           | IOL_151_173          | 1                      | 0                          
| video_pll_m0/u_pll_e1/goppll                       | CLKOUT1         | video_clk5x_w                  | PLL_82_51            | 1                      | 0                          
| u_CORES/u_GTP_SCANCHAIN_PG/scanchain               | CAPDR           | u_CORES/capt_o                 | SCANCHAIN_48_328     | 1                      | 0                          
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

Device Cell Placement Summary for IO Clock Buffer:
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source  Name                                       | Source  Pin     | Source-Buffer Net     | Buffer Input Pin     | Buffer  Name                                                                        | Buffer Output Pin     | Buffer-Load Net                                                    | Buffer Site        | IO Load Clock Region     | Non-IO Load Clock Region     | Clock Loads     | Non-Clock Loads     
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT0_WL      | clkout0_wl_0          | CLK                  | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclkbuf01_dut/gopclkgate     | OUT                   | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclk_01     | IOCKGATE_6_56      | (0,3,2,27)               | (17,17,13,13)                | 20              | 1                   
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT0_WL      | clkout0_wl_0          | CLK                  | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclkbuf02_dut/gopclkgate     | OUT                   | u_ipsl_hmic_h_top/u_ipsl_hmic_h_phy_top/u_phy_io_v1_1/ioclk_02     | IOCKGATE_6_181     | (1,3,37,43)              | (1,3,37,43)                  | 3               | 0                   
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

Device Cell Placement Summary for IO Clock Source:
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Source Name                                        | Source  Pin     | Source-Load Net     | Source Site     | Clock Buffer Loads     | Non-Clock Buffer Loads     
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| u_ipsl_hmic_h_top/u_pll_50_400/u_pll_e1/goppll     | CLKOUT0_WL      | clkout0_wl_0        | PLL_82_71       | 2                      | 0                          
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+

